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<a href="#func-members">Functions</a> &#124;
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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>This is the main file for Xilinx HDMI TX core. </p>
<p>Please see <a class="el" href="xv__hdmitx1_8h.html" title="This is the main header file for Xilinx HDMI TX core. ">xv_hdmitx1.h</a> for more details of the driver.</p>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who    Date     Changes
</p>
<hr/>
<p>
1.00  EB     22/05/18 Initial release.
</pre> </div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ade49d67af0d4ac0c3d5756a5cfdfe15f"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ade49d67af0d4ac0c3d5756a5cfdfe15f">XV_HdmiTx1_CfgInitialize</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, <a class="el" href="struct_x_v___hdmi_tx1___config.html">XV_HdmiTx1_Config</a> *CfgPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ade49d67af0d4ac0c3d5756a5cfdfe15f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes the HDMI TX core.  <a href="#ade49d67af0d4ac0c3d5756a5cfdfe15f">More...</a><br/></td></tr>
<tr class="separator:ade49d67af0d4ac0c3d5756a5cfdfe15f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6c007b416e2eeb72cc040a16b285b57c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a6c007b416e2eeb72cc040a16b285b57c">XV_HdmiTx1_SetAxiClkFreq</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u32 ClkFreq)</td></tr>
<tr class="memdesc:a6c007b416e2eeb72cc040a16b285b57c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the AXI4-Lite Clock Frequency.  <a href="#a6c007b416e2eeb72cc040a16b285b57c">More...</a><br/></td></tr>
<tr class="separator:a6c007b416e2eeb72cc040a16b285b57c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa350caac92add60e1c85f257dbf88bdd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#aa350caac92add60e1c85f257dbf88bdd">XV_HdmiTx1_SetHdmiFrlMode</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:aa350caac92add60e1c85f257dbf88bdd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the core into HDMI FRL mode.  <a href="#aa350caac92add60e1c85f257dbf88bdd">More...</a><br/></td></tr>
<tr class="separator:aa350caac92add60e1c85f257dbf88bdd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a214597c0aaa431427bb76ec6948563b8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a214597c0aaa431427bb76ec6948563b8">XV_HdmiTx1_SetHdmiTmdsMode</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a214597c0aaa431427bb76ec6948563b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the core into HDMI TMDS mode.  <a href="#a214597c0aaa431427bb76ec6948563b8">More...</a><br/></td></tr>
<tr class="separator:a214597c0aaa431427bb76ec6948563b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abaf1a4638cb906d3ead0e42630727ad1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#abaf1a4638cb906d3ead0e42630727ad1">XV_HdmiTx1_SetDviMode</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:abaf1a4638cb906d3ead0e42630727ad1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the core into DVI mode.  <a href="#abaf1a4638cb906d3ead0e42630727ad1">More...</a><br/></td></tr>
<tr class="separator:abaf1a4638cb906d3ead0e42630727ad1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1b7d74b3288271064644bda7857a1c8b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a1b7d74b3288271064644bda7857a1c8b">XV_HdmiTx1_AuxEnable</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a1b7d74b3288271064644bda7857a1c8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the HDMI TX Auxiliary (AUX) peripheral.  <a href="#a1b7d74b3288271064644bda7857a1c8b">More...</a><br/></td></tr>
<tr class="separator:a1b7d74b3288271064644bda7857a1c8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae842f2e11b05dbc07382f202bffbf7ea"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ae842f2e11b05dbc07382f202bffbf7ea">XV_HdmiTx1_AudioEnable</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ae842f2e11b05dbc07382f202bffbf7ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro enables audio in HDMI TX core.  <a href="#ae842f2e11b05dbc07382f202bffbf7ea">More...</a><br/></td></tr>
<tr class="separator:ae842f2e11b05dbc07382f202bffbf7ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a626c53ccaef2fea0d712d363e80691ac"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a626c53ccaef2fea0d712d363e80691ac">XV_HdmiTx1_Clear</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a626c53ccaef2fea0d712d363e80691ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clear the HDMI TX variables and sets it to the defaults.  <a href="#a626c53ccaef2fea0d712d363e80691ac">More...</a><br/></td></tr>
<tr class="separator:a626c53ccaef2fea0d712d363e80691ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac0969e712c2e4170732589e66359f592"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ac0969e712c2e4170732589e66359f592">XV_HdmiTx1_Start</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ac0969e712c2e4170732589e66359f592"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function starts the HDMI TX core.  <a href="#ac0969e712c2e4170732589e66359f592">More...</a><br/></td></tr>
<tr class="separator:ac0969e712c2e4170732589e66359f592"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac338e05672272398dfcd6748dd92da1a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ac338e05672272398dfcd6748dd92da1a">XV_HdmiTx1_Stop</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ac338e05672272398dfcd6748dd92da1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function stops the HDMI TX core.  <a href="#ac338e05672272398dfcd6748dd92da1a">More...</a><br/></td></tr>
<tr class="separator:ac338e05672272398dfcd6748dd92da1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abc7b6f6ccf8cebbdbd102c9ce612cd96"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#abc7b6f6ccf8cebbdbd102c9ce612cd96">XV_HdmiTx1_LookupVic</a> (XVidC_VideoMode VideoMode)</td></tr>
<tr class="memdesc:abc7b6f6ccf8cebbdbd102c9ce612cd96"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides video identification code of video mode.  <a href="#abc7b6f6ccf8cebbdbd102c9ce612cd96">More...</a><br/></td></tr>
<tr class="separator:abc7b6f6ccf8cebbdbd102c9ce612cd96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2fdc16b8be464514b4d72ddfb947cee9"><td class="memItemLeft" align="right" valign="top">u64&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a2fdc16b8be464514b4d72ddfb947cee9">XV_HdmiTx1_GetTmdsClk</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a2fdc16b8be464514b4d72ddfb947cee9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets and return the TMDS Clock based on Video Parameter from the InstancePtr.  <a href="#a2fdc16b8be464514b4d72ddfb947cee9">More...</a><br/></td></tr>
<tr class="separator:a2fdc16b8be464514b4d72ddfb947cee9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a83f6939b0f5205344a276489afe45223"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a83f6939b0f5205344a276489afe45223">XV_HdmiTx1_Scrambler</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a83f6939b0f5205344a276489afe45223"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function controls the scrambler.  <a href="#a83f6939b0f5205344a276489afe45223">More...</a><br/></td></tr>
<tr class="separator:a83f6939b0f5205344a276489afe45223"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af8b34671e3735035e8dd68f6bdbb7904"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#af8b34671e3735035e8dd68f6bdbb7904">XV_HdmiTx1_ClockRatio</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:af8b34671e3735035e8dd68f6bdbb7904"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function controls the TMDS clock ratio.  <a href="#af8b34671e3735035e8dd68f6bdbb7904">More...</a><br/></td></tr>
<tr class="separator:af8b34671e3735035e8dd68f6bdbb7904"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab2deec246bd2a50733347cdb293e7d59"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ab2deec246bd2a50733347cdb293e7d59">XV_HdmiTx1_DetectHdmi20</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ab2deec246bd2a50733347cdb293e7d59"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function detects connected sink is a HDMI 2.0/HDMI 1.4 sink device and sets appropriate flag in the TX stream.  <a href="#ab2deec246bd2a50733347cdb293e7d59">More...</a><br/></td></tr>
<tr class="separator:ab2deec246bd2a50733347cdb293e7d59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a74ffa1683c6444f4ba05916b5c15312a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a74ffa1683c6444f4ba05916b5c15312a">XV_HdmiTx1_ShowSCDC</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a74ffa1683c6444f4ba05916b5c15312a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function shows the sinks SCDC registers.  <a href="#a74ffa1683c6444f4ba05916b5c15312a">More...</a><br/></td></tr>
<tr class="separator:a74ffa1683c6444f4ba05916b5c15312a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9a54be6bc654bbf6386734a5a741918d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a9a54be6bc654bbf6386734a5a741918d">XV_HdmiTx1_SetStream</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, XVidC_VideoTiming VideoTiming, XVidC_FrameRate FrameRate, XVidC_ColorFormat ColorFormat, XVidC_ColorDepth Bpc, XVidC_PixelsPerClock Ppc, XVidC_3DInfo *Info3D, u8 FVaFactor, u8 VrrEnabled, u8 CnmvrrEnabled, u64 *TmdsClock)</td></tr>
<tr class="memdesc:a9a54be6bc654bbf6386734a5a741918d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the HDMI TX stream parameters.  <a href="#a9a54be6bc654bbf6386734a5a741918d">More...</a><br/></td></tr>
<tr class="separator:a9a54be6bc654bbf6386734a5a741918d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adf9e5c73a5f308d04eea85dd4db8f42f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#adf9e5c73a5f308d04eea85dd4db8f42f">XV_HdmiTx1_INT_VRST</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:adf9e5c73a5f308d04eea85dd4db8f42f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function asserts or releases the HDMI TX Internal VRST.  <a href="#adf9e5c73a5f308d04eea85dd4db8f42f">More...</a><br/></td></tr>
<tr class="separator:adf9e5c73a5f308d04eea85dd4db8f42f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aecd47642f9aa91941d14c04543f73827"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#aecd47642f9aa91941d14c04543f73827">XV_HdmiTx1_INT_LRST</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:aecd47642f9aa91941d14c04543f73827"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function asserts or releases the HDMI TX Internal LRST.  <a href="#aecd47642f9aa91941d14c04543f73827">More...</a><br/></td></tr>
<tr class="separator:aecd47642f9aa91941d14c04543f73827"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a73e17f2ac248affe52270168283ba45f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a73e17f2ac248affe52270168283ba45f">XV_HdmiTx1_EXT_VRST</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:a73e17f2ac248affe52270168283ba45f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function asserts or releases the HDMI TX External VRST.  <a href="#a73e17f2ac248affe52270168283ba45f">More...</a><br/></td></tr>
<tr class="separator:a73e17f2ac248affe52270168283ba45f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a74e6c88c1599a6f0290c5db420bc8d50"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a74e6c88c1599a6f0290c5db420bc8d50">XV_HdmiTx1_EXT_SYSRST</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:a74e6c88c1599a6f0290c5db420bc8d50"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function asserts or releases the HDMI TX External SYSRST.  <a href="#a74e6c88c1599a6f0290c5db420bc8d50">More...</a><br/></td></tr>
<tr class="separator:a74e6c88c1599a6f0290c5db420bc8d50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab1fbe68d90e50414180d190c9f4c5a75"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ab1fbe68d90e50414180d190c9f4c5a75">XV_HdmiTx1_SetGcpAvmuteBit</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ab1fbe68d90e50414180d190c9f4c5a75"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the HDMI TX AUX GCP register AVMUTE bit.  <a href="#ab1fbe68d90e50414180d190c9f4c5a75">More...</a><br/></td></tr>
<tr class="separator:ab1fbe68d90e50414180d190c9f4c5a75"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afad06f0251d19842573b1f2695149e8c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#afad06f0251d19842573b1f2695149e8c">XV_HdmiTx1_ClearGcpAvmuteBit</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:afad06f0251d19842573b1f2695149e8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the HDMI TX AUX GCP register AVMUTE bit.  <a href="#afad06f0251d19842573b1f2695149e8c">More...</a><br/></td></tr>
<tr class="separator:afad06f0251d19842573b1f2695149e8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8052b352068e63f196e7cb4eaba721e1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a8052b352068e63f196e7cb4eaba721e1">XV_HdmiTx1_SetGcpClearAvmuteBit</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a8052b352068e63f196e7cb4eaba721e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the HDMI TX AUX GCP register CLEAR_AVMUTE bit.  <a href="#a8052b352068e63f196e7cb4eaba721e1">More...</a><br/></td></tr>
<tr class="separator:a8052b352068e63f196e7cb4eaba721e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae56341f568a34cc9c677f5d8c822e156"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ae56341f568a34cc9c677f5d8c822e156">XV_HdmiTx1_ClearGcpClearAvmuteBit</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ae56341f568a34cc9c677f5d8c822e156"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the HDMI TX AUX GCP register CLEAR_AVMUTE bit.  <a href="#ae56341f568a34cc9c677f5d8c822e156">More...</a><br/></td></tr>
<tr class="separator:ae56341f568a34cc9c677f5d8c822e156"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a606cf8a2a1153de19c66925b9d462636"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a606cf8a2a1153de19c66925b9d462636">XV_HdmiTx1_SetPixelRate</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a606cf8a2a1153de19c66925b9d462636"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the pixel rate at output.  <a href="#a606cf8a2a1153de19c66925b9d462636">More...</a><br/></td></tr>
<tr class="separator:a606cf8a2a1153de19c66925b9d462636"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab1c2a996dc8766605df5df4d6a37eb45"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ab1c2a996dc8766605df5df4d6a37eb45">XV_HdmiTx1_SetSampleRate</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 SampleRate)</td></tr>
<tr class="memdesc:ab1c2a996dc8766605df5df4d6a37eb45"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the sample rate at output.  <a href="#ab1c2a996dc8766605df5df4d6a37eb45">More...</a><br/></td></tr>
<tr class="separator:ab1c2a996dc8766605df5df4d6a37eb45"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0aa5bbd57a95785df766d6d5a919479a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a0aa5bbd57a95785df766d6d5a919479a">XV_HdmiTx1_SetColorFormat</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a0aa5bbd57a95785df766d6d5a919479a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the color format.  <a href="#a0aa5bbd57a95785df766d6d5a919479a">More...</a><br/></td></tr>
<tr class="separator:a0aa5bbd57a95785df766d6d5a919479a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a25379b09e782626e79fd3b785b671f2e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a25379b09e782626e79fd3b785b671f2e">XV_HdmiTx1_SetColorDepth</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a25379b09e782626e79fd3b785b671f2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the color depth.  <a href="#a25379b09e782626e79fd3b785b671f2e">More...</a><br/></td></tr>
<tr class="separator:a25379b09e782626e79fd3b785b671f2e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0304469fda5cb9070c1c0db0c229f11c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a0304469fda5cb9070c1c0db0c229f11c">XV_HdmiTx1_DdcInit</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u32 Frequency)</td></tr>
<tr class="memdesc:a0304469fda5cb9070c1c0db0c229f11c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prepares TX DDC peripheral to use.  <a href="#a0304469fda5cb9070c1c0db0c229f11c">More...</a><br/></td></tr>
<tr class="separator:a0304469fda5cb9070c1c0db0c229f11c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a76353bf20bfbb1f162c56117c2f71b59"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a76353bf20bfbb1f162c56117c2f71b59">XV_HdmiTx1_DdcGetAck</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a76353bf20bfbb1f162c56117c2f71b59"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the acknowledge flag.  <a href="#a76353bf20bfbb1f162c56117c2f71b59">More...</a><br/></td></tr>
<tr class="separator:a76353bf20bfbb1f162c56117c2f71b59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a12496535333a1068fef5929b566faf5a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a12496535333a1068fef5929b566faf5a">XV_HdmiTx1_DdcWaitForDone</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a12496535333a1068fef5929b566faf5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function waits for the done flag to be set.  <a href="#a12496535333a1068fef5929b566faf5a">More...</a><br/></td></tr>
<tr class="separator:a12496535333a1068fef5929b566faf5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a199e2e62f3ebaa5993d935bf2bde0462"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a199e2e62f3ebaa5993d935bf2bde0462">XV_HdmiTx1_DdcWriteCommand</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u32 Cmd)</td></tr>
<tr class="memdesc:a199e2e62f3ebaa5993d935bf2bde0462"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function writes data into the command fifo.  <a href="#a199e2e62f3ebaa5993d935bf2bde0462">More...</a><br/></td></tr>
<tr class="separator:a199e2e62f3ebaa5993d935bf2bde0462"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0320f379245cb86d83f5eb565adf6ad8"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a0320f379245cb86d83f5eb565adf6ad8">XV_HdmiTx1_DdcReadData</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a0320f379245cb86d83f5eb565adf6ad8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads data from the data fifo.  <a href="#a0320f379245cb86d83f5eb565adf6ad8">More...</a><br/></td></tr>
<tr class="separator:a0320f379245cb86d83f5eb565adf6ad8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab587002464f4dbfd8db9b39199bb4bdc"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 Slave, u16 Length, u8 *Buffer, u8 Stop)</td></tr>
<tr class="memdesc:ab587002464f4dbfd8db9b39199bb4bdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function writes data from DDC peripheral from given slave address.  <a href="#ab587002464f4dbfd8db9b39199bb4bdc">More...</a><br/></td></tr>
<tr class="separator:ab587002464f4dbfd8db9b39199bb4bdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8e431bf1d16450b478448424d81e72ea"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 Slave, u16 Length, u8 *Buffer, u8 Stop)</td></tr>
<tr class="memdesc:a8e431bf1d16450b478448424d81e72ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads data from DDC peripheral from given slave address.  <a href="#a8e431bf1d16450b478448424d81e72ea">More...</a><br/></td></tr>
<tr class="separator:a8e431bf1d16450b478448424d81e72ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9a71a92b44c225aa265a3c5852971df7"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a9a71a92b44c225aa265a3c5852971df7">XV_HdmiTx1_DdcReadReg</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 Slave, u16 Length, u8 RegAddr, u8 *Buffer)</td></tr>
<tr class="memdesc:a9a71a92b44c225aa265a3c5852971df7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads specified register from DDC peripheral from given slave address.  <a href="#a9a71a92b44c225aa265a3c5852971df7">More...</a><br/></td></tr>
<tr class="separator:a9a71a92b44c225aa265a3c5852971df7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab9b6a97a3396e177e52f69f6b5d88123"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ab9b6a97a3396e177e52f69f6b5d88123">XV_HdmiTx1_DdcWriteField</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, XV_HdmiTx1_ScdcFieldType Field, u8 Value)</td></tr>
<tr class="memdesc:ab9b6a97a3396e177e52f69f6b5d88123"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function writes the specified SCDC Field.  <a href="#ab9b6a97a3396e177e52f69f6b5d88123">More...</a><br/></td></tr>
<tr class="separator:ab9b6a97a3396e177e52f69f6b5d88123"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0ac2f0429e283d420ab2498273c288a4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a0ac2f0429e283d420ab2498273c288a4">XV_HdmiTx1_Aux_Dsc_Send_Header</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u32 Data)</td></tr>
<tr class="memdesc:a0ac2f0429e283d420ab2498273c288a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function transmits the DSC packet header.  <a href="#a0ac2f0429e283d420ab2498273c288a4">More...</a><br/></td></tr>
<tr class="separator:a0ac2f0429e283d420ab2498273c288a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afaf9e97accf4f26abbdac8ef9410dcab"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#afaf9e97accf4f26abbdac8ef9410dcab">XV_HdmiTx1_Aux_Dsc_Send_Data</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u32 Data)</td></tr>
<tr class="memdesc:afaf9e97accf4f26abbdac8ef9410dcab"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function transmits the DSC packet data.  <a href="#afaf9e97accf4f26abbdac8ef9410dcab">More...</a><br/></td></tr>
<tr class="separator:afaf9e97accf4f26abbdac8ef9410dcab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a49560390a20d63cec3fd7c79c2f44a76"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a49560390a20d63cec3fd7c79c2f44a76">XV_HdmiTx1_AuxSend</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a49560390a20d63cec3fd7c79c2f44a76"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function transmits the infoframes generated by the processor.  <a href="#a49560390a20d63cec3fd7c79c2f44a76">More...</a><br/></td></tr>
<tr class="separator:a49560390a20d63cec3fd7c79c2f44a76"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab0ff2a9927fe900b25456955341dfa31"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ab0ff2a9927fe900b25456955341dfa31">XV_HdmiTx1_Info</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ab0ff2a9927fe900b25456955341dfa31"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints stream and timing information on STDIO/Uart console.  <a href="#ab0ff2a9927fe900b25456955341dfa31">More...</a><br/></td></tr>
<tr class="separator:ab0ff2a9927fe900b25456955341dfa31"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab79a6440a7ae1001abe1b5f6ab6e7c1b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ab79a6440a7ae1001abe1b5f6ab6e7c1b">XV_HdmiTx1_DebugInfo</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ab79a6440a7ae1001abe1b5f6ab6e7c1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints debug information on STDIO/UART console.  <a href="#ab79a6440a7ae1001abe1b5f6ab6e7c1b">More...</a><br/></td></tr>
<tr class="separator:ab79a6440a7ae1001abe1b5f6ab6e7c1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7bd42ae44563fd0dc91d40c0dfe8d7c3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a7bd42ae44563fd0dc91d40c0dfe8d7c3">XV_HdmiTx1_RegisterDebug</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a7bd42ae44563fd0dc91d40c0dfe8d7c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints out HDMI TX register.  <a href="#a7bd42ae44563fd0dc91d40c0dfe8d7c3">More...</a><br/></td></tr>
<tr class="separator:a7bd42ae44563fd0dc91d40c0dfe8d7c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad3a48e290c617a6ede63a42f1d586364"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ad3a48e290c617a6ede63a42f1d586364">XV_HdmiTx1_IsStreamScrambled</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ad3a48e290c617a6ede63a42f1d586364"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides status of the stream.  <a href="#ad3a48e290c617a6ede63a42f1d586364">More...</a><br/></td></tr>
<tr class="separator:ad3a48e290c617a6ede63a42f1d586364"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa0ee62f31bc2ceaa6b7dd92618560a0a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#aa0ee62f31bc2ceaa6b7dd92618560a0a">XV_HdmiTx1_IsStreamConnected</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:aa0ee62f31bc2ceaa6b7dd92618560a0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides the stream connected status.  <a href="#aa0ee62f31bc2ceaa6b7dd92618560a0a">More...</a><br/></td></tr>
<tr class="separator:aa0ee62f31bc2ceaa6b7dd92618560a0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad22b60a3d798ee469dcc71a04100843d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ad22b60a3d798ee469dcc71a04100843d">XV_HdmiTx1_FRLACRStart</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ad22b60a3d798ee469dcc71a04100843d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function Starts the internal ACR module for FRL.  <a href="#ad22b60a3d798ee469dcc71a04100843d">More...</a><br/></td></tr>
<tr class="separator:ad22b60a3d798ee469dcc71a04100843d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7f1498e69d193cbd626999414e863558"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a7f1498e69d193cbd626999414e863558">XV_HdmiTx1_TMDSACRStart</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a7f1498e69d193cbd626999414e863558"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function Starts the internal ACR module for FRL.  <a href="#a7f1498e69d193cbd626999414e863558">More...</a><br/></td></tr>
<tr class="separator:a7f1498e69d193cbd626999414e863558"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae0d426d4100141b3e9f9d943197d07e8"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ae0d426d4100141b3e9f9d943197d07e8">XV_HdmiTx1_SetAudioChannels</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, u8 Value)</td></tr>
<tr class="memdesc:ae0d426d4100141b3e9f9d943197d07e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the active audio channels.  <a href="#ae0d426d4100141b3e9f9d943197d07e8">More...</a><br/></td></tr>
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<tr class="memitem:a937b182eae5d5d5eefe0e7cbc0e833c7"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a937b182eae5d5d5eefe0e7cbc0e833c7">XV_HdmiTxSs1_GetAudioCtsVal</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a937b182eae5d5d5eefe0e7cbc0e833c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the Generated ACR CTS Value.  <a href="#a937b182eae5d5d5eefe0e7cbc0e833c7">More...</a><br/></td></tr>
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<tr class="memitem:a58b5302d9843f58fcf1336d2a0ab9bcd"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a58b5302d9843f58fcf1336d2a0ab9bcd">XV_HdmiTxSs1_GetAudioNVal</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a58b5302d9843f58fcf1336d2a0ab9bcd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the programmed ACR N Value.  <a href="#a58b5302d9843f58fcf1336d2a0ab9bcd">More...</a><br/></td></tr>
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<tr class="memitem:a23a20e6c1144064686e03fd0650ec46f"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a23a20e6c1144064686e03fd0650ec46f">XV_HdmiTx1_SetAudioFormat</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr, XV_HdmiTx1_AudioFormatType Value)</td></tr>
<tr class="memdesc:a23a20e6c1144064686e03fd0650ec46f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the active audio format.  <a href="#a23a20e6c1144064686e03fd0650ec46f">More...</a><br/></td></tr>
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<tr class="memitem:ae2022f3a37591ca01f2028e0e938e331"><td class="memItemLeft" align="right" valign="top">XV_HdmiTx1_AudioFormatType&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#ae2022f3a37591ca01f2028e0e938e331">XV_HdmiTx1_GetAudioFormat</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ae2022f3a37591ca01f2028e0e938e331"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the active audio format.  <a href="#ae2022f3a37591ca01f2028e0e938e331">More...</a><br/></td></tr>
<tr class="separator:ae2022f3a37591ca01f2028e0e938e331"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4623f1c32afecde613bfb2c4517597b1"><td class="memItemLeft" align="right" valign="top">u8 *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a4623f1c32afecde613bfb2c4517597b1">XV_HdmiTx1_GetScdcEdRegisters</a> (<a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a4623f1c32afecde613bfb2c4517597b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads the CED and RSED registers from the sink and returns the pointer to the data structure which stores the CED related readings (from SCDC register 0x50 to 0x5A).  <a href="#a4623f1c32afecde613bfb2c4517597b1">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:a46ca3fb41b5abeb8cbe5818d84164c36"><td class="memItemLeft" align="right" valign="top">const <a class="el" href="struct_x_v___hdmi_tx1___scdc_field.html">XV_HdmiTx1_ScdcField</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmitx1_8c.html#a46ca3fb41b5abeb8cbe5818d84164c36">ScdcField</a> [XV_HDMITX1_SCDCFIELD_SIZE]</td></tr>
<tr class="memdesc:a46ca3fb41b5abeb8cbe5818d84164c36"><td class="mdescLeft">&#160;</td><td class="mdescRight">This table contains the attributes for SCDC fields Each entry consists of: 1) Register Offset 2) Bits Mask 3) Bits Shift.  <a href="#a46ca3fb41b5abeb8cbe5818d84164c36">More...</a><br/></td></tr>
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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">void XV_HdmiTx1_AudioEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This macro enables audio in HDMI TX core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a0b6ca194e0811b7201545d206d1a49e3">XV_HDMITX1_AUD_CTRL_RUN_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac630a1dbb83be6d4e64757a3d09c2cc0">XV_HDMITX1_AUD_CTRL_SET_OFFSET</a>, <a class="el" href="xv__hdmitx1_8c.html#ad22b60a3d798ee469dcc71a04100843d">XV_HdmiTx1_FRLACRStart()</a>, <a class="el" href="xv__hdmitx1_8c.html#a7f1498e69d193cbd626999414e863558">XV_HdmiTx1_TMDSACRStart()</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#ae0d426d4100141b3e9f9d943197d07e8">XV_HdmiTx1_SetAudioChannels()</a>, <a class="el" href="xv__hdmitx1_8h.html#a23a20e6c1144064686e03fd0650ec46f">XV_HdmiTx1_SetAudioFormat()</a>, <a class="el" href="xv__hdmitx1_8h.html#aa350caac92add60e1c85f257dbf88bdd">XV_HdmiTx1_SetHdmiFrlMode()</a>, and <a class="el" href="xv__hdmitx1_8h.html#a214597c0aaa431427bb76ec6948563b8">XV_HdmiTx1_SetHdmiTmdsMode()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_Aux_Dsc_Send_Data </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>This function transmits the DSC packet data. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Data</td><td>value to be written</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_Aux_Dsc_Send_Header </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>This function transmits the DSC packet header. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Data</td><td>value to be written</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_AuxEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function enables the HDMI TX Auxiliary (AUX) peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#add021f22d0ef7e0de595b74f105d4572">XV_HDMITX1_AUX_CTRL_RUN_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a97406fdf0b5b815f1a99e48f9f769ab9">XV_HDMITX1_AUX_CTRL_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a86472ba3e4497749a3b0af4fd446137d">XV_HdmiTx1_FrlStreamStart()</a>, <a class="el" href="xv__hdmitx1_8h.html#aa350caac92add60e1c85f257dbf88bdd">XV_HdmiTx1_SetHdmiFrlMode()</a>, and <a class="el" href="xv__hdmitx1_8h.html#a214597c0aaa431427bb76ec6948563b8">XV_HdmiTx1_SetHdmiTmdsMode()</a>.</p>

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          <td class="memname">u32 XV_HdmiTx1_AuxSend </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function transmits the infoframes generated by the processor. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if infoframes transmitted successfully.</li>
<li>XST_FAILURE if AUX FIFO is full.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1.html#a2fcf639e71cb04c30a8f00c3ce401f63">XV_HdmiTx1::Aux</a>, <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ae77c642360ad975ab150de8a8c269d25">XV_HDMITX1_AUX_DAT_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a7bfb37aac0d6dd176a5d5be6e05697d9">XV_HDMITX1_AUX_STA_FIFO_FUL_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a14dcc9b57dc6ff4a5d43c9df86e54723">XV_HDMITX1_AUX_STA_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a778b10c4ff90127e6787100a6836a791">XV_HDMITX1_AUX_STA_PKT_RDY_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">int XV_HdmiTx1_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1___config.html">XV_HdmiTx1_Config</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
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<p>This function initializes the HDMI TX core. </p>
<p>This function must be called prior to using the HDMI TX core. Initialization of the HDMI TX includes setting up the instance data and ensuring the hardware is in a quiescent state.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>points to the configuration structure associated with the HDMI TX core. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if XV_HdmiTx1_CfgInitialize was successful.</li>
<li>XST_FAILURE if HDMI TX PIO ID mismatched.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#ac110c3e0296b6f95e3647410e3ddadd2">XV_HdmiTx1_Stream::Audio</a>, <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#aef6b3f6753d278df67f1c9803f667e08">XV_HdmiTx1::ConnectCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a7fa66e3baa8894a6c59b3fbc96d18354">XV_HdmiTx1_Stream::CorePixPerClk</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a2b619bbff33578107cf420cacecd2e18">XV_HdmiTx1::DscDecodeFailCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#aa75eb56d2fcf4058da44bb2a2c3eba9b">XV_HdmiTx1::DynHdrMtwCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#aeb7e0c79ea8b44c2eac37ce9a063587e">XV_HdmiTx1_Stream::Frl</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#ac495d5b8980b11427969918c7ea6eb56">XV_HdmiTx1::FrlConfigCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#ada61680a6092bdfeb4057cbd70e07584">XV_HdmiTx1::FrlFfeCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a4a76a4f44c11da6514bfcd2b366ee79a">XV_HdmiTx1::FrlStartCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#abc1b2a59bc184f8461952572773a3b1d">XV_HdmiTx1::FrlStopCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#afa7e042159e99edf7f02139af8cba046">XV_HdmiTx1_Stream::IsConnected</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#abc4e2c7cd581d8e407d845f1a620d3d8">XV_HdmiTx1::IsReady</a>, <a class="el" href="struct_x_v___hdmi_tx1___frl.html#ac95410542d1d4eed581f66c49e70a9bb">XV_HdmiTx1_Frl::Lanes</a>, <a class="el" href="struct_x_v___hdmi_tx1___frl.html#a7ae9e5018c441354a23323082dc6aa76">XV_HdmiTx1_Frl::MaxFrlRate</a>, <a class="el" href="struct_x_v___hdmi_tx1___config.html#a7f80ad7a8e8dd3c68792fcda5196f74a">XV_HdmiTx1_Config::MaxFrlRate</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a9947243bcf378409927347939617a886">XV_HdmiTx1_Stream::OverrideScrambler</a>, <a class="el" href="struct_x_v___hdmi_tx1___frl.html#ade3e232e0d44b497785c50202a441ef6">XV_HdmiTx1_Frl::RateLock</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a59d80fb969eedd5ca7c59960fe5460a7">XV_HdmiTx1_Stream::State</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a4929690dcb3684990ea7cb5d2f6cb497">XV_HdmiTx1::StreamDownCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a01870b62d198af5f708b320a2339f9d3">XV_HdmiTx1::StreamUpCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a7be7f63d8a5bd9f54b4e186dc82820bc">XV_HdmiTx1::TmdsConfigCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#af48a03329a29f3358af6bc289f510797">XV_HdmiTx1::ToggleCallback</a>, <a class="el" href="struct_x_v___hdmi_tx1___frl.html#afb1cf1b7d51092ef7429b95a4353ab4d">XV_HdmiTx1_Frl::TrainingState</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a529cf861436423034baa776592647e3e">XV_HdmiTx1::VsCallback</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a279874e2cee1de19fee34f5f25fe4198">XV_HDMITX1_AUD_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac630a1dbb83be6d4e64757a3d09c2cc0">XV_HDMITX1_AUD_CTRL_SET_OFFSET</a>, <a class="el" href="xv__hdmitx1_8h.html#ac80822fe192ddd125e321cdf4c9d4608">XV_HdmiTx1_AudioDisable</a>, <a class="el" href="xv__hdmitx1_8h.html#a885cea7ad25eb7470e839cbe329b8ec4">XV_HdmiTx1_AuxDisable</a>, <a class="el" href="xv__hdmitx1_8c.html#a626c53ccaef2fea0d712d363e80691ac">XV_HdmiTx1_Clear()</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a5f8f27b07f3e43e7bf04c5bda2e1179f">XV_HDMITX1_CONNECT_CONF_OFFSET</a>, <a class="el" href="xv__hdmitx1_8h.html#a48c24836f4ff579b8bf3ed1dfc298747">XV_HdmiTx1_DdcDisable</a>, <a class="el" href="xv__hdmitx1_8h.html#a1a4bb321f73f08e71204821bb3c68b3d">XV_HdmiTx1_DdcIntrClear</a>, <a class="el" href="xv__hdmitx1_8h.html#a8f3afde27c63f277de13d600ae3118ef">XV_HdmiTx1_FrlExecute()</a>, <a class="el" href="xv__hdmitx1_8h.html#a8c3339f7859efd76ec6a3ee262e20caa">XV_HdmiTx1_FrlExtVidCkeSource()</a>, <a class="el" href="xv__hdmitx1__frl_8h.html#a58012592af0eafb0b1bdbce08aa70169">XV_HdmiTx1_FrlIntrDisable</a>, <a class="el" href="xv__hdmitx1__frl_8h.html#aaa2b17ec29b80b19f9fa18abadeef78b">XV_HdmiTx1_FrlIntrEnable</a>, <a class="el" href="xv__hdmitx1_8h.html#a9ae3d651a0d9b2258415a0fcd243ee0c">XV_HdmiTx1_FrlReset()</a>, <a class="el" href="xv__hdmitx1_8h.html#ab4c65e1485f6003c182e86c2423d1934">XV_HdmiTx1_GetTime1Ms</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a8239e53495feea5050dbda9cad646119">XV_HDMITX1_HPD_TIMEGRID_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a02751a20bad34eb921ded41ecd6449bd">XV_HDMITX1_MASK_16</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a85275d4df3edf2c08d38d544b5928c95">XV_HDMITX1_PIO_ID</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a771c245a4146fa673670d145a49ab42c">XV_HDMITX1_PIO_ID_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a47d0be5976cb417367f227882aba616a">XV_HDMITX1_PIO_IN_BRDG_LOCKED_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ad7989878b63e6d1ccc17b9fffebdb1e7">XV_HDMITX1_PIO_IN_BRDG_OVERFLOW_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a9d53bbc6e4513d332030da84a4d5366c">XV_HDMITX1_PIO_IN_BRDG_UNDERFLOW_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a0840f8be0f908f0ebf7f88da62919041">XV_HDMITX1_PIO_IN_EVT_FE_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a083e42899636cd5e11e57dc81ed473d1">XV_HDMITX1_PIO_IN_EVT_RE_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a8e4ab9f93df19e5011f0abc4b62d6d68">XV_HDMITX1_PIO_IN_HPD_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#acaa33be8f32fd160bc231fe83d8e4e7b">XV_HDMITX1_PIO_IN_HPD_TOGGLE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a9c67bb4f654071b9bbd7c0bb57bd431b">XV_HDMITX1_PIO_IN_LNK_RDY_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aa69dc4de1fcc61075bb66a5f72498f09">XV_HDMITX1_PIO_IN_VS_MASK</a>, <a class="el" href="xv__hdmitx1_8h.html#adc65c495c5346d5026795fd9ae6d7cd7">XV_HdmiTx1_PioDisable</a>, <a class="el" href="xv__hdmitx1_8h.html#a7e5757f2158d4aae374aa076fbc147e7">XV_HdmiTx1_PioIntrClear</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>, <a class="el" href="xv__hdmitx1_8c.html#a214597c0aaa431427bb76ec6948563b8">XV_HdmiTx1_SetHdmiTmdsMode()</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a52b7d366cc179f1aa90b20ae9ed5a6de">XV_HDMITX1_SHIFT_16</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a3154f6e901d66ba2320ccf5ab4d08821">XV_HDMITX1_TOGGLE_CONF_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_Clear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function clear the HDMI TX variables and sets it to the defaults. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or init. </dd></dl>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#ade49d67af0d4ac0c3d5756a5cfdfe15f">XV_HdmiTx1_CfgInitialize()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_ClearGcpAvmuteBit </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function clears the HDMI TX AUX GCP register AVMUTE bit. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a34819a1c42353de5eec449bc38c93efc">XV_HDMITX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#acdf644126236c17fe0561f8b7b35e848">XV_HDMITX1_PIO_OUT_GCP_AVMUTE_MASK</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_ClearGcpClearAvmuteBit </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function clears the HDMI TX AUX GCP register CLEAR_AVMUTE bit. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a34819a1c42353de5eec449bc38c93efc">XV_HDMITX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#af12c5bc4580008e386420488c4dc2945">XV_HDMITX1_PIO_OUT_GCP_CLEARAVMUTE_MASK</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">int XV_HdmiTx1_ClockRatio </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function controls the TMDS clock ratio. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if HDMI 2.0</li>
<li>XST_FAILURE if HDMI 1.4</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a4cee4a4b0708d7e886ab923114753d75">XV_HdmiTx1_Stream::ScdcSupport</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#abd62e567ccef9f34c2614909fed625ce">XV_HdmiTx1_Stream::TMDSClockRatio</a>, <a class="el" href="xv__hdmitx1_8c.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>, and <a class="el" href="xv__hdmitx1_8c.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a7a20221c997a381a61b4e7e98c5a4370">XV_HdmiTx1_SetStream()</a>.</p>

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          <td class="memname">int XV_HdmiTx1_DdcGetAck </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function gets the acknowledge flag. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a7a18917060714340b40a33de19976226">XV_HDMITX1_DDC_STA_ACK_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a76a8d1762bfc7aafed3ae667630f47d6">XV_HDMITX1_DDC_STA_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>, and <a class="el" href="xv__hdmitx1_8h.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_DdcInit </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Frequency</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function prepares TX DDC peripheral to use. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Frequency</td><td>specifies the value that needs to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac2f786b3061b4df4c53544b6e90f9644">XV_HDMITX1_DDC_CTRL_CLK_DIV_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a446a4adab4ed3b06eb0834191bfa15d9">XV_HDMITX1_DDC_CTRL_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a6c007b416e2eeb72cc040a16b285b57c">XV_HdmiTx1_SetAxiClkFreq()</a>.</p>

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          <td class="memname">int XV_HdmiTx1_DdcRead </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Slave</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Length</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>Buffer</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Stop</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function reads data from DDC peripheral from given slave address. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Slave</td><td>specifies the slave address from where data needs to be read. </td></tr>
    <tr><td class="paramname">Length</td><td>specifies number of bytes to be read. </td></tr>
    <tr><td class="paramname">Buffer</td><td>specifies a pointer to u8 variable that will be filled with data. </td></tr>
    <tr><td class="paramname">Stop</td><td>specifies the stop flag which is either TRUE/FALSE.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if an acknowledgement received and timeout.</li>
<li>XST_FAILURE if no acknowledgement received.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a7c6cd9c2d19d95db83b737e22375377a">XV_HDMITX1_DDC_CMD_RD_TOKEN</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac055e0da09799cd2bf1deaaf7d594a9b">XV_HDMITX1_DDC_CMD_STP_TOKEN</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a845b5618c93a1561f1a0a14c8f3eff8e">XV_HDMITX1_DDC_CMD_STR_TOKEN</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a138fe51f7ce3717cfaf38b3a67098566">XV_HDMITX1_DDC_CMD_WR_TOKEN</a>, <a class="el" href="xv__hdmitx1_8h.html#a48c24836f4ff579b8bf3ed1dfc298747">XV_HdmiTx1_DdcDisable</a>, <a class="el" href="xv__hdmitx1_8h.html#aa2bd58dc021ee4fe7b52eca1125f39b6">XV_HdmiTx1_DdcEnable</a>, <a class="el" href="xv__hdmitx1_8c.html#a76353bf20bfbb1f162c56117c2f71b59">XV_HdmiTx1_DdcGetAck()</a>, <a class="el" href="xv__hdmitx1_8h.html#a0a0262addeb5640e4b2d681202559056">XV_HdmiTx1_DdcIntrDisable</a>, <a class="el" href="xv__hdmitx1_8c.html#a0320f379245cb86d83f5eb565adf6ad8">XV_HdmiTx1_DdcReadData()</a>, <a class="el" href="xv__hdmitx1_8c.html#a12496535333a1068fef5929b566faf5a">XV_HdmiTx1_DdcWaitForDone()</a>, <a class="el" href="xv__hdmitx1_8c.html#a199e2e62f3ebaa5993d935bf2bde0462">XV_HdmiTx1_DdcWriteCommand()</a>, <a class="el" href="xv__hdmitx1_8h.html#abe9d06ce9943cedc448f905806cbc6a2">XV_HdmiTx1_GetFrlTimer()</a>, <a class="el" href="xv__hdmitx1_8h.html#a8acc56c70efc79834e9411b6cff105c5">XV_HdmiTx1_PioIntrDisable</a>, <a class="el" href="xv__hdmitx1_8h.html#ac1422deaecdcaa680769832bbcfaf8a7">XV_HdmiTx1_PioIntrEnable</a>, and <a class="el" href="xv__hdmitx1_8h.html#a5c81c3da135fd69e74aa106dadce0ca4">XV_HdmiTx1_SetFrlTimerClockCycles()</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#af8b34671e3735035e8dd68f6bdbb7904">XV_HdmiTx1_ClockRatio()</a>, <a class="el" href="xv__hdmitx1_8h.html#a9a71a92b44c225aa265a3c5852971df7">XV_HdmiTx1_DdcReadReg()</a>, <a class="el" href="xv__hdmitx1_8h.html#ab9b6a97a3396e177e52f69f6b5d88123">XV_HdmiTx1_DdcWriteField()</a>, <a class="el" href="xv__hdmitx1_8h.html#a83f6939b0f5205344a276489afe45223">XV_HdmiTx1_Scrambler()</a>, and <a class="el" href="xv__hdmitx1_8h.html#a74ffa1683c6444f4ba05916b5c15312a">XV_HdmiTx1_ShowSCDC()</a>.</p>

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          <td class="memname">u8 XV_HdmiTx1_DdcReadData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function reads data from the data fifo. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a446a4adab4ed3b06eb0834191bfa15d9">XV_HDMITX1_DDC_CTRL_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a7ff97e413ac155c87891bc822fa79213">XV_HDMITX1_DDC_CTRL_RUN_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#afaa80a0d738dde8b78bf9eff80002872">XV_HDMITX1_DDC_DAT_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#af92b02d943db10c03bd66537c4b73e3d">XV_HDMITX1_DDC_STA_DAT_EMPTY</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a76a8d1762bfc7aafed3ae667630f47d6">XV_HDMITX1_DDC_STA_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>.</p>

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          <td class="memname">int XV_HdmiTx1_DdcReadReg </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Slave</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Length</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>RegAddr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>Buffer</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function reads specified register from DDC peripheral from given slave address. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Slave</td><td>specifies the slave address from where data needs to be read. </td></tr>
    <tr><td class="paramname">Length</td><td>specifies number of bytes to be read. </td></tr>
    <tr><td class="paramname">RegAddr</td><td>specifies the register address from where data needs to be read. </td></tr>
    <tr><td class="paramname">Buffer</td><td>specifies a pointer to u8 variable that will be filled with data. </td></tr>
    <tr><td class="paramname">Stop</td><td>specifies the stop flag which is either TRUE/FALSE.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if an acknowledgement received and timeout.</li>
<li>XST_FAILURE if no acknowledgement received.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1_8c.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>, and <a class="el" href="xv__hdmitx1_8c.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a4623f1c32afecde613bfb2c4517597b1">XV_HdmiTx1_GetScdcEdRegisters()</a>.</p>

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          <td class="memname">int XV_HdmiTx1_DdcWaitForDone </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function waits for the done flag to be set. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a446a4adab4ed3b06eb0834191bfa15d9">XV_HDMITX1_DDC_CTRL_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a7ff97e413ac155c87891bc822fa79213">XV_HDMITX1_DDC_CTRL_RUN_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a0e2070bd8eb10e5ab04afd78224a7c7f">XV_HDMITX1_DDC_STA_DONE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a76a8d1762bfc7aafed3ae667630f47d6">XV_HDMITX1_DDC_STA_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aa139f217587a626986768317c2efb5e3">XV_HDMITX1_DDC_STA_TIMEOUT_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>, and <a class="el" href="xv__hdmitx1_8h.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>.</p>

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          <td class="memname">int XV_HdmiTx1_DdcWrite </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Slave</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Length</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>Buffer</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Stop</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function writes data from DDC peripheral from given slave address. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Slave</td><td>specifies the slave address from where data needs to be read. </td></tr>
    <tr><td class="paramname">Length</td><td>specifies number of bytes to be read. </td></tr>
    <tr><td class="paramname">Buffer</td><td>specifies a pointer to u8 variable that will be filled with data. </td></tr>
    <tr><td class="paramname">Stop</td><td>specifies the stop flag which is either TRUE/FALSE.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if an acknowledgement received and timeout.</li>
<li>XST_FAILURE if no acknowledgement received.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#ac055e0da09799cd2bf1deaaf7d594a9b">XV_HDMITX1_DDC_CMD_STP_TOKEN</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a845b5618c93a1561f1a0a14c8f3eff8e">XV_HDMITX1_DDC_CMD_STR_TOKEN</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a138fe51f7ce3717cfaf38b3a67098566">XV_HDMITX1_DDC_CMD_WR_TOKEN</a>, <a class="el" href="xv__hdmitx1_8h.html#a48c24836f4ff579b8bf3ed1dfc298747">XV_HdmiTx1_DdcDisable</a>, <a class="el" href="xv__hdmitx1_8h.html#aa2bd58dc021ee4fe7b52eca1125f39b6">XV_HdmiTx1_DdcEnable</a>, <a class="el" href="xv__hdmitx1_8c.html#a76353bf20bfbb1f162c56117c2f71b59">XV_HdmiTx1_DdcGetAck()</a>, <a class="el" href="xv__hdmitx1_8h.html#a0a0262addeb5640e4b2d681202559056">XV_HdmiTx1_DdcIntrDisable</a>, <a class="el" href="xv__hdmitx1_8c.html#a12496535333a1068fef5929b566faf5a">XV_HdmiTx1_DdcWaitForDone()</a>, <a class="el" href="xv__hdmitx1_8c.html#a199e2e62f3ebaa5993d935bf2bde0462">XV_HdmiTx1_DdcWriteCommand()</a>, <a class="el" href="xv__hdmitx1_8h.html#abe9d06ce9943cedc448f905806cbc6a2">XV_HdmiTx1_GetFrlTimer()</a>, <a class="el" href="xv__hdmitx1_8h.html#a8acc56c70efc79834e9411b6cff105c5">XV_HdmiTx1_PioIntrDisable</a>, <a class="el" href="xv__hdmitx1_8h.html#ac1422deaecdcaa680769832bbcfaf8a7">XV_HdmiTx1_PioIntrEnable</a>, and <a class="el" href="xv__hdmitx1_8h.html#a5c81c3da135fd69e74aa106dadce0ca4">XV_HdmiTx1_SetFrlTimerClockCycles()</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#af8b34671e3735035e8dd68f6bdbb7904">XV_HdmiTx1_ClockRatio()</a>, <a class="el" href="xv__hdmitx1_8h.html#a9a71a92b44c225aa265a3c5852971df7">XV_HdmiTx1_DdcReadReg()</a>, <a class="el" href="xv__hdmitx1_8h.html#ab9b6a97a3396e177e52f69f6b5d88123">XV_HdmiTx1_DdcWriteField()</a>, <a class="el" href="xv__hdmitx1_8h.html#ab2deec246bd2a50733347cdb293e7d59">XV_HdmiTx1_DetectHdmi20()</a>, <a class="el" href="xv__hdmitx1_8h.html#a83f6939b0f5205344a276489afe45223">XV_HdmiTx1_Scrambler()</a>, and <a class="el" href="xv__hdmitx1_8h.html#a74ffa1683c6444f4ba05916b5c15312a">XV_HdmiTx1_ShowSCDC()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_DdcWriteCommand </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Cmd</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function writes data into the command fifo. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a96820760e1aae244998532830dd393fa">XV_HDMITX1_DDC_CMD_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a446a4adab4ed3b06eb0834191bfa15d9">XV_HDMITX1_DDC_CTRL_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a7ff97e413ac155c87891bc822fa79213">XV_HDMITX1_DDC_CTRL_RUN_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a332860dddbc7497d6cf29f5d9fd7b247">XV_HDMITX1_DDC_STA_CMD_FULL</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a76a8d1762bfc7aafed3ae667630f47d6">XV_HDMITX1_DDC_STA_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>, and <a class="el" href="xv__hdmitx1_8h.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>.</p>

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          <td class="memname">int XV_HdmiTx1_DdcWriteField </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XV_HdmiTx1_ScdcFieldType&#160;</td>
          <td class="paramname"><em>Field</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Value</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function writes the specified SCDC Field. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
    <tr><td class="paramname">Field</td><td>specifies the fields from SCDC channels to be written</td></tr>
    <tr><td class="paramname">Value</td><td>specifies the values to be written</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS</li>
<li>XST_FAILURE</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___scdc_field.html#a39181b894a165c980e854e870fb00880">XV_HdmiTx1_ScdcField::Mask</a>, <a class="el" href="struct_x_v___hdmi_tx1___scdc_field.html#a97c8c91664f438732ef2c372f99aefbb">XV_HdmiTx1_ScdcField::Offset</a>, <a class="el" href="struct_x_v___hdmi_tx1___scdc_field.html#ac7ec60c1297e56cef90f46f30078f81c">XV_HdmiTx1_ScdcField::Shift</a>, <a class="el" href="xv__hdmitx1_8c.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>, and <a class="el" href="xv__hdmitx1_8c.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#ad03f1110009425d476e007abd30898d6">XV_HdmiTx1_FrlRate()</a>, and <a class="el" href="xv__hdmitx1_8h.html#a730bc782f3ed005fbff8e45c1dbd055a">XV_HdmiTx1_FrlTrainingInit()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_DebugInfo </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function prints debug information on STDIO/UART console. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#afb2c02dfd40e7248cb5137d1fda16451">XV_HDMITX1_ANLZ_HBP_HS_HPB_SZ_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a0b0c1fc1bd8023ff5443e48be1a37d52">XV_HDMITX1_ANLZ_HBP_HS_HPB_SZ_SHIFT</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a2a337b11e7ed5c655aaa779fcb92238e">XV_HDMITX1_ANLZ_HBP_HS_HS_SZ_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a1e0129ded92751eb5637c0d3a3af7ec7">XV_HDMITX1_ANLZ_HBP_HS_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ab5ee2d3c0b53adc5e1baabe4bc0d8471">XV_HDMITX1_ANLZ_LN_ACT_ACT_SZ_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a553fc17abc52bfc2212f49243b910963">XV_HDMITX1_ANLZ_LN_ACT_LN_SZ_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aecc45e839afee440ecd5c614a0f6c379">XV_HDMITX1_ANLZ_LN_ACT_LN_SZ_SHIFT</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ad97a50cec14720080dc2ff6e5fd41809">XV_HDMITX1_ANLZ_LN_ACT_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a4839aca0ca1a11f8b1553026a33d8e6e">XV_HDMITX1_DBG_STS_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a5fe062b0a3114ac13ab10e99fd02dcd3">XV_HDMITX1_FRL_CTRL_LN_OP_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#abc06f99f814e758f194f5afab57fd7e1">XV_HDMITX1_FRL_CTRL_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#af14a628baf787a604f23d2114b5ef16a">XV_HDMITX1_FRL_CTRL_OP_MODE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#abcfb2ad0c96c0240bd2211dba81810d0">XV_HDMITX1_FRL_LNK_CLK_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ab380ac5aacd7ffc41be4c522f4a86b76">XV_HDMITX1_FRL_STA_LNK_CLK_OOS_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#af69097b14c333e4e03d8934c68e5666a">XV_HDMITX1_FRL_STA_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ab43b8614d7ac425f46252b52f4934fe5">XV_HDMITX1_FRL_VCKE_EXT_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ae77246dd4776e8a41f7b92c093c4e1a0">XV_HDMITX1_FRL_VID_CLK_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a47d0be5976cb417367f227882aba616a">XV_HDMITX1_PIO_IN_BRDG_LOCKED_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ab20b6e84abcd0378fbc8e17282eacb16">XV_HDMITX1_PIO_IN_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a4ce35ba56d898dd0b26cc1466d7ff9e6">XV_HDMITX1_PIO_OUT_MODE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aef14faec6d7dec76359597de87c027e1">XV_HDMITX1_PIO_OUT_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a2a61ed968e178ed839d00ed19855ded3">XV_HDMITX1_VCKE_SYS_CNT_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#acdb9781981b55f2a70cf2ef4e50e00cb">XV_HDMITX1_VER_ID_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#ab85b13706cb38b267c66b44d3533e000">XV_HDMITX1_VER_VERSION_OFFSET</a>.</p>

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          <td class="memname">int XV_HdmiTx1_DetectHdmi20 </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function detects connected sink is a HDMI 2.0/HDMI 1.4 sink device and sets appropriate flag in the TX stream. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if HDMI 2.0</li>
<li>XST_FAILURE if HDMI 1.4</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a4cee4a4b0708d7e886ab923114753d75">XV_HdmiTx1_Stream::ScdcSupport</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, and <a class="el" href="xv__hdmitx1_8c.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_EXT_SYSRST </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function asserts or releases the HDMI TX External SYSRST. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either assert or release HDMI TX External SYSRST.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI TX. Therefore, clearing the PIO reset output will assert the HDMI External system reset. C-style signature: void <a class="el" href="xv__hdmitx1_8h.html#a74e6c88c1599a6f0290c5db420bc8d50" title="This function asserts or releases the HDMI TX External SYSRST. ">XV_HdmiTx1_EXT_SYSRST(XV_HdmiTx1 *InstancePtr, u8 Reset)</a> </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a34819a1c42353de5eec449bc38c93efc">XV_HDMITX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a11a55e987433d85234ed12bbaeae13ad">XV_HDMITX1_PIO_OUT_EXT_SYSRST_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a916d49f0a22d9ef6e369ff80353e00af">XV_HDMITX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_EXT_VRST </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function asserts or releases the HDMI TX External VRST. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either assert or release HDMI TX External VRST.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI TX. Therefore, clearing the PIO reset output will assert the HDMI external video reset. C-style signature: void <a class="el" href="xv__hdmitx1_8h.html#a73e17f2ac248affe52270168283ba45f" title="This function asserts or releases the HDMI TX External VRST. ">XV_HdmiTx1_EXT_VRST(XV_HdmiTx1 *InstancePtr, u8 Reset)</a> </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a34819a1c42353de5eec449bc38c93efc">XV_HDMITX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a0ef4633d186e31591484e815f99ef471">XV_HDMITX1_PIO_OUT_EXT_VRST_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a916d49f0a22d9ef6e369ff80353e00af">XV_HDMITX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_FRLACRStart </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function Starts the internal ACR module for FRL. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Active audio format of HDMI Tx</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#ac110c3e0296b6f95e3647410e3ddadd2">XV_HdmiTx1_Stream::Audio</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#aeb7e0c79ea8b44c2eac37ce9a063587e">XV_HdmiTx1_Stream::Frl</a>, <a class="el" href="struct_x_v___hdmi_tx1___frl.html#a8d9f5de0ab29699e3308bbcd372d7888">XV_HdmiTx1_Frl::LineRate</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a07578cb7628cd825336759685d553253">XV_HDMITX1_AUD_ACR_N_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a279874e2cee1de19fee34f5f25fe4198">XV_HDMITX1_AUD_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac630a1dbb83be6d4e64757a3d09c2cc0">XV_HDMITX1_AUD_CTRL_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#ae842f2e11b05dbc07382f202bffbf7ea">XV_HdmiTx1_AudioEnable()</a>.</p>

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          <td class="memname">XV_HdmiTx1_AudioFormatType XV_HdmiTx1_GetAudioFormat </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function gets the active audio format. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Active audio format of HDMI Tx</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a52b9186ae2de6f7846338a83b0d7047f">XV_HDMITX1_AUD_CTRL_3DAUDFMT_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a93c2f397d3ac840e116f0d2d9dd74262">XV_HDMITX1_AUD_CTRL_AUDFMT_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac103acef218d3189d2317c829c70e60e">XV_HDMITX1_AUD_CTRL_AUDFMT_SHIFT</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a5c80837a1f240f83e131771e1180bf32">XV_HDMITX1_AUD_CTRL_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>.</p>

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          <td class="memname">u8* XV_HdmiTx1_GetScdcEdRegisters </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function reads the CED and RSED registers from the sink and returns the pointer to the data structure which stores the CED related readings (from SCDC register 0x50 to 0x5A). </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Tx core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Reading the SCDC registers will clear the values at the sink </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a94632fdfed2327f40f06b80162ae6244">XV_HdmiTx1_Stream::ScdcEd</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, and <a class="el" href="xv__hdmitx1_8c.html#a9a71a92b44c225aa265a3c5852971df7">XV_HdmiTx1_DdcReadReg()</a>.</p>

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          <td class="memname">u64 XV_HdmiTx1_GetTmdsClk </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets and return the TMDS Clock based on Video Parameter from the InstancePtr. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TMDS Clock</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a9516babecbb4fd2a295df625a12473d5">XV_HdmiTx1_Stream::PixelClk</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, and <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a294dfd0caf934682685fafc257d49e2b">XV_HdmiTx1_Stream::Video</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a7a20221c997a381a61b4e7e98c5a4370">XV_HdmiTx1_SetStream()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_Info </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function prints stream and timing information on STDIO/Uart console. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, and <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a294dfd0caf934682685fafc257d49e2b">XV_HdmiTx1_Stream::Video</a>.</p>

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          <td class="memname">void XV_HdmiTx1_INT_LRST </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function asserts or releases the HDMI TX Internal LRST. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either assert or release HDMI TX Internal LRST.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI TX. Therefore, clearing the PIO reset output will assert the HDMI Internal link reset. C-style signature: void <a class="el" href="xv__hdmitx1_8h.html#adf9e5c73a5f308d04eea85dd4db8f42f" title="This function asserts or releases the HDMI TX Internal VRST. ">XV_HdmiTx1_INT_VRST(XV_HdmiTx1 *InstancePtr, u8 Reset)</a> </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a34819a1c42353de5eec449bc38c93efc">XV_HDMITX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ae926811c3ab955754b7e1d34e06c0b30">XV_HDMITX1_PIO_OUT_INT_LRST_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a916d49f0a22d9ef6e369ff80353e00af">XV_HDMITX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_INT_VRST </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function asserts or releases the HDMI TX Internal VRST. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either assert or release HDMI TX Internal VRST.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI TX. Therefore, clearing the PIO reset output will assert the HDMI Internal video reset. C-style signature: void <a class="el" href="xv__hdmitx1_8h.html#adf9e5c73a5f308d04eea85dd4db8f42f" title="This function asserts or releases the HDMI TX Internal VRST. ">XV_HdmiTx1_INT_VRST(XV_HdmiTx1 *InstancePtr, u8 Reset)</a> </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a34819a1c42353de5eec449bc38c93efc">XV_HDMITX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#abb0a513439f7691a66e0baba33ee7e99">XV_HDMITX1_PIO_OUT_INT_VRST_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a916d49f0a22d9ef6e369ff80353e00af">XV_HDMITX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">int XV_HdmiTx1_IsStreamConnected </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function provides the stream connected status. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = Stream is connected.</li>
<li>FALSE = Stream is connected.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#afa7e042159e99edf7f02139af8cba046">XV_HdmiTx1_Stream::IsConnected</a>, and <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>.</p>

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          <td class="memname">int XV_HdmiTx1_IsStreamScrambled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function provides status of the stream. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = Scrambled.</li>
<li>FALSE = Not scrambled.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a195ea9a4cc60940fab80604ebb6a2651">XV_HdmiTx1_Stream::IsScrambled</a>, and <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>.</p>

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          <td class="memname">u8 XV_HdmiTx1_LookupVic </td>
          <td>(</td>
          <td class="paramtype">XVidC_VideoMode&#160;</td>
          <td class="paramname"><em>VideoMode</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function provides video identification code of video mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">VideoMode</td><td>specifies resolution identifier.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Video identification code defined in the VIC table.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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          <td class="memname">void XV_HdmiTx1_RegisterDebug </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function prints out HDMI TX register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a91a37eb1ef5f54705a9643b9ff7c8797">XV_HDMITX1_FRL_FEC_ERR_INJ_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>.</p>

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          <td class="memname">int XV_HdmiTx1_Scrambler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function controls the scrambler. </p>
<p>Requires TMDSClock to be up to date in order to force enable scrambler when TMDSClock &gt; 340MHz.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if HDMI 2.0</li>
<li>XST_FAILURE if HDMI 1.4</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a195ea9a4cc60940fab80604ebb6a2651">XV_HdmiTx1_Stream::IsScrambled</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a9947243bcf378409927347939617a886">XV_HdmiTx1_Stream::OverrideScrambler</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a4cee4a4b0708d7e886ab923114753d75">XV_HdmiTx1_Stream::ScdcSupport</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a07e8f7fff100be805de99a80219c2f8c">XV_HdmiTx1_Stream::TMDSClock</a>, <a class="el" href="xv__hdmitx1_8c.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>, <a class="el" href="xv__hdmitx1_8c.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>, and <a class="el" href="xv__hdmitx1_8h.html#a669f967b9baf869d60aa8dc35297ee3a">XV_HdmiTx1_SetScrambler</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a7a20221c997a381a61b4e7e98c5a4370">XV_HdmiTx1_SetStream()</a>.</p>

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          <td class="memname">int XV_HdmiTx1_SetAudioChannels </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Value</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function sets the active audio channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if active channels were set.</li>
<li>XST_FAILURE if no active channles were set.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a07040ad23704877ed3f55d8f25456b95">XV_HDMITX1_3DAUD_CTRL_CH_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a73acb585d91a8a036c65d832a7ff030d">XV_HDMITX1_3DAUD_CTRL_CH_SHIFT</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a29066f63afe9beeadac7a04ef1fecb3b">XV_HDMITX1_AUD_CTRL_CH_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a091a4a9dacc2d0fd8f881d5b6486f11e">XV_HDMITX1_AUD_CTRL_CH_SHIFT</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a279874e2cee1de19fee34f5f25fe4198">XV_HDMITX1_AUD_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a5c80837a1f240f83e131771e1180bf32">XV_HDMITX1_AUD_CTRL_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a0b6ca194e0811b7201545d206d1a49e3">XV_HDMITX1_AUD_CTRL_RUN_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac630a1dbb83be6d4e64757a3d09c2cc0">XV_HDMITX1_AUD_CTRL_SET_OFFSET</a>, <a class="el" href="xv__hdmitx1_8c.html#ae842f2e11b05dbc07382f202bffbf7ea">XV_HdmiTx1_AudioEnable()</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">int XV_HdmiTx1_SetAudioFormat </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XV_HdmiTx1_AudioFormatType&#160;</td>
          <td class="paramname"><em>Value</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the active audio format. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if active channels were set.</li>
<li>XST_FAILURE if no active channles were set.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a7098260b81b3a81f1325d55f3fc5e25a">XV_HDMITX1_AUD_CTRL_3DAUDFMT_EN</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a52b9186ae2de6f7846338a83b0d7047f">XV_HDMITX1_AUD_CTRL_3DAUDFMT_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a93c2f397d3ac840e116f0d2d9dd74262">XV_HDMITX1_AUD_CTRL_AUDFMT_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a279874e2cee1de19fee34f5f25fe4198">XV_HDMITX1_AUD_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a5c80837a1f240f83e131771e1180bf32">XV_HDMITX1_AUD_CTRL_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a0b6ca194e0811b7201545d206d1a49e3">XV_HDMITX1_AUD_CTRL_RUN_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac630a1dbb83be6d4e64757a3d09c2cc0">XV_HDMITX1_AUD_CTRL_SET_OFFSET</a>, <a class="el" href="xv__hdmitx1_8c.html#ae842f2e11b05dbc07382f202bffbf7ea">XV_HdmiTx1_AudioEnable()</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetAxiClkFreq </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ClkFreq</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the AXI4-Lite Clock Frequency. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">ClkFreq</td><td>specifies the value that needs to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or init. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#aed733a651634b05b6113daf320c32646">XV_HdmiTx1::CpuClkFreq</a>, and <a class="el" href="xv__hdmitx1_8c.html#a0304469fda5cb9070c1c0db0c229f11c">XV_HdmiTx1_DdcInit()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetColorDepth </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets the color depth. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a294dfd0caf934682685fafc257d49e2b">XV_HdmiTx1_Stream::Video</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a58610b772b050b3a4504d274bd53f09a">XV_HDMITX1_PIO_OUT_COLOR_DEPTH_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a9044e4c1c1a22e9f5540b3e28e164ebe">XV_HDMITX1_PIO_OUT_COLOR_DEPTH_SHIFT</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ae9de0ab9551b81695551dd340024f11a">XV_HDMITX1_PIO_OUT_MSK_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aef14faec6d7dec76359597de87c027e1">XV_HDMITX1_PIO_OUT_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a7a20221c997a381a61b4e7e98c5a4370">XV_HdmiTx1_SetStream()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetColorFormat </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the color format. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a294dfd0caf934682685fafc257d49e2b">XV_HdmiTx1_Stream::Video</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac9a6bae49a6bba1d495a19e74aff47d8">XV_HDMITX1_PIO_OUT_COLOR_SPACE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aef681ccbd7dad5067f84ef4b7ecdc685">XV_HDMITX1_PIO_OUT_COLOR_SPACE_SHIFT</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ae9de0ab9551b81695551dd340024f11a">XV_HDMITX1_PIO_OUT_MSK_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aef14faec6d7dec76359597de87c027e1">XV_HDMITX1_PIO_OUT_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a7a20221c997a381a61b4e7e98c5a4370">XV_HdmiTx1_SetStream()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetDviMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets the core into DVI mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or init. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="xv__hdmitx1_8h.html#ac80822fe192ddd125e321cdf4c9d4608">XV_HdmiTx1_AudioDisable</a>, <a class="el" href="xv__hdmitx1_8h.html#a885cea7ad25eb7470e839cbe329b8ec4">XV_HdmiTx1_AuxDisable</a>, and <a class="el" href="xv__hdmitx1_8h.html#a4ed1526a4760bbcb4b978ff021fbc360">XV_HdmiTx1_ClearMode</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetGcpAvmuteBit </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the HDMI TX AUX GCP register AVMUTE bit. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#acdf644126236c17fe0561f8b7b35e848">XV_HDMITX1_PIO_OUT_GCP_AVMUTE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a916d49f0a22d9ef6e369ff80353e00af">XV_HDMITX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetGcpClearAvmuteBit </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the HDMI TX AUX GCP register CLEAR_AVMUTE bit. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#af12c5bc4580008e386420488c4dc2945">XV_HDMITX1_PIO_OUT_GCP_CLEARAVMUTE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a916d49f0a22d9ef6e369ff80353e00af">XV_HDMITX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetHdmiFrlMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets the core into HDMI FRL mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or init. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="xv__hdmitx1_8c.html#ae842f2e11b05dbc07382f202bffbf7ea">XV_HdmiTx1_AudioEnable()</a>, <a class="el" href="xv__hdmitx1_8c.html#a1b7d74b3288271064644bda7857a1c8b">XV_HdmiTx1_AuxEnable()</a>, and <a class="el" href="xv__hdmitx1_8h.html#af3a6c361d3eb8f9bc43cc1d4f6bc2269">XV_HdmiTx1_SetMode</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetHdmiTmdsMode </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets the core into HDMI TMDS mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or init. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="xv__hdmitx1_8c.html#ae842f2e11b05dbc07382f202bffbf7ea">XV_HdmiTx1_AudioEnable()</a>, <a class="el" href="xv__hdmitx1_8c.html#a1b7d74b3288271064644bda7857a1c8b">XV_HdmiTx1_AuxEnable()</a>, and <a class="el" href="xv__hdmitx1_8h.html#af3a6c361d3eb8f9bc43cc1d4f6bc2269">XV_HdmiTx1_SetMode</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#ade49d67af0d4ac0c3d5756a5cfdfe15f">XV_HdmiTx1_CfgInitialize()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetPixelRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets the pixel rate at output. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a7fa66e3baa8894a6c59b3fbc96d18354">XV_HdmiTx1_Stream::CorePixPerClk</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ae9de0ab9551b81695551dd340024f11a">XV_HDMITX1_PIO_OUT_MSK_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aef14faec6d7dec76359597de87c027e1">XV_HDMITX1_PIO_OUT_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a493cc4bcc9456c6e4b5b7b6f4ef278c7">XV_HDMITX1_PIO_OUT_PIXEL_RATE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a6fe7c0047c787b5b463931d65a9857aa">XV_HDMITX1_PIO_OUT_PIXEL_RATE_SHIFT</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#a7a20221c997a381a61b4e7e98c5a4370">XV_HdmiTx1_SetStream()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_SetSampleRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>SampleRate</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the sample rate at output. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">SampleRate</td><td>specifies the value that needs to be set.<ul>
<li>2 samples per clock</li>
<li>3 samples per clock.</li>
<li>5 samples per clock.</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___config.html#ac9448a4fb60f4bf571da4e1c49bf0056">XV_HdmiTx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a821b6ed4f07983491f150fb061ba224e">XV_HdmiTx1::Config</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#aa3aac13005a54f8b27d42bf9c3f4b17d">XV_HdmiTx1_Stream::SampleRate</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ae9de0ab9551b81695551dd340024f11a">XV_HDMITX1_PIO_OUT_MSK_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#aef14faec6d7dec76359597de87c027e1">XV_HDMITX1_PIO_OUT_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a36e3a208b0ef9f5385c89a994916c49c">XV_HDMITX1_PIO_OUT_SAMPLE_RATE_MASK</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ab23dda9e51f0e85b00f859790bce3ad4">XV_HDMITX1_PIO_OUT_SAMPLE_RATE_SHIFT</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

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          <td class="memname">u32 XV_HdmiTx1_SetStream </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_VideoTiming&#160;</td>
          <td class="paramname"><em>VideoTiming</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_FrameRate&#160;</td>
          <td class="paramname"><em>FrameRate</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_ColorFormat&#160;</td>
          <td class="paramname"><em>ColorFormat</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_ColorDepth&#160;</td>
          <td class="paramname"><em>Bpc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_PixelsPerClock&#160;</td>
          <td class="paramname"><em>Ppc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_3DInfo *&#160;</td>
          <td class="paramname"><em>Info3D</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>FVaFactor</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>VrrEnabled</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>CnmvrrEnabled</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64 *&#160;</td>
          <td class="paramname"><em>TmdsClock</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the HDMI TX stream parameters. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance. </td></tr>
    <tr><td class="paramname">VideoTiming</td><td>specifies video timing. </td></tr>
    <tr><td class="paramname">FrameRate</td><td>specifies frame rate. </td></tr>
    <tr><td class="paramname">ColorFormat</td><td>specifies the type of color format.<ul>
<li>0 = XVIDC_CSF_RGB</li>
<li>1 = XVIDC_CSF_YCRCB_444</li>
<li>2 = XVIDC_CSF_YCRCB_422</li>
<li>3 = XVIDC_CSF_YCRCB_420 </li>
</ul>
</td></tr>
    <tr><td class="paramname">Bpc</td><td>specifies the color depth/bits per color component.<ul>
<li>6 = XVIDC_BPC_6</li>
<li>8 = XVIDC_BPC_8</li>
<li>10 = XVIDC_BPC_10</li>
<li>12 = XVIDC_BPC_12</li>
<li>16 = XVIDC_BPC_16 </li>
</ul>
</td></tr>
    <tr><td class="paramname">Ppc</td><td>specifies the pixel per clock.<ul>
<li>4 = XVIDC_PPC_4 </li>
</ul>
</td></tr>
    <tr><td class="paramname">Info3D</td><td>3D info </td></tr>
    <tr><td class="paramname">FVaFactor</td><td>- Fast Video Active Factor </td></tr>
    <tr><td class="paramname">VrrEnabled</td><td>- VRR is enabled or not </td></tr>
    <tr><td class="paramname">CnmvrrEnabled</td><td>- Negative VRR supported flag </td></tr>
    <tr><td class="paramname">TmdsClock,reference</td><td>clock calculated based on the input parameters.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS on success else XST_FAILURE</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>
<p>In HDMI the colordepth in YUV422 is always 12 bits, although on the link itself it is being transmitted as 8-bits. Therefore if the colorspace is YUV422, then force the colordepth to 12 bits. </p>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a195ea9a4cc60940fab80604ebb6a2651">XV_HdmiTx1_Stream::IsScrambled</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a4cee4a4b0708d7e886ab923114753d75">XV_HdmiTx1_Stream::ScdcSupport</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a07e8f7fff100be805de99a80219c2f8c">XV_HdmiTx1_Stream::TMDSClock</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#abd62e567ccef9f34c2614909fed625ce">XV_HdmiTx1_Stream::TMDSClockRatio</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a294dfd0caf934682685fafc257d49e2b">XV_HdmiTx1_Stream::Video</a>, <a class="el" href="xv__hdmitx1_8c.html#af8b34671e3735035e8dd68f6bdbb7904">XV_HdmiTx1_ClockRatio()</a>, <a class="el" href="xv__hdmitx1_8c.html#a2fdc16b8be464514b4d72ddfb947cee9">XV_HdmiTx1_GetTmdsClk()</a>, <a class="el" href="xv__hdmitx1_8c.html#a83f6939b0f5205344a276489afe45223">XV_HdmiTx1_Scrambler()</a>, <a class="el" href="xv__hdmitx1_8c.html#a25379b09e782626e79fd3b785b671f2e">XV_HdmiTx1_SetColorDepth()</a>, <a class="el" href="xv__hdmitx1_8c.html#a0aa5bbd57a95785df766d6d5a919479a">XV_HdmiTx1_SetColorFormat()</a>, and <a class="el" href="xv__hdmitx1_8c.html#a606cf8a2a1153de19c66925b9d462636">XV_HdmiTx1_SetPixelRate()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_ShowSCDC </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function shows the sinks SCDC registers. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1_8c.html#a8e431bf1d16450b478448424d81e72ea">XV_HdmiTx1_DdcRead()</a>, and <a class="el" href="xv__hdmitx1_8c.html#ab587002464f4dbfd8db9b39199bb4bdc">XV_HdmiTx1_DdcWrite()</a>.</p>

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          <td class="memname">void XV_HdmiTx1_Start </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function starts the HDMI TX core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or initialization. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1_8h.html#aee2b7ea5870d1eb94eb90bbfe2130e50">XV_HdmiTx1_PioEnable</a>, and <a class="el" href="xv__hdmitx1_8h.html#ac1422deaecdcaa680769832bbcfaf8a7">XV_HdmiTx1_PioIntrEnable</a>.</p>

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          <td class="memname">void XV_HdmiTx1_Stop </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function stops the HDMI TX core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1_8h.html#adc65c495c5346d5026795fd9ae6d7cd7">XV_HdmiTx1_PioDisable</a>, and <a class="el" href="xv__hdmitx1_8h.html#a8acc56c70efc79834e9411b6cff105c5">XV_HdmiTx1_PioIntrDisable</a>.</p>

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          <td class="memname">void XV_HdmiTx1_TMDSACRStart </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function Starts the internal ACR module for FRL. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_tx1.html" title="The XV_HdmiTx1 driver instance data. ">XV_HdmiTx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Active audio format of HDMI Tx</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_tx1___stream.html#ac110c3e0296b6f95e3647410e3ddadd2">XV_HdmiTx1_Stream::Audio</a>, <a class="el" href="struct_x_v___hdmi_tx1.html#a8812d5981337da9bcf42bd9ea41bb8ea">XV_HdmiTx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_tx1___stream.html#a07e8f7fff100be805de99a80219c2f8c">XV_HdmiTx1_Stream::TMDSClock</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a07578cb7628cd825336759685d553253">XV_HDMITX1_AUD_ACR_N_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#a279874e2cee1de19fee34f5f25fe4198">XV_HDMITX1_AUD_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmitx1__hw_8h.html#ac630a1dbb83be6d4e64757a3d09c2cc0">XV_HDMITX1_AUD_CTRL_SET_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#af4ba16c8e4e0505aa1e7ea79d06eb2d4">XV_HdmiTx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmitx1_8h.html#ae842f2e11b05dbc07382f202bffbf7ea">XV_HdmiTx1_AudioEnable()</a>.</p>

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          <td class="memname">u32 XV_HdmiTxSs1_GetAudioCtsVal </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function gets the Generated ACR CTS Value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XV_HdmiTxSs1 core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Generated ACR CTS Value</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#adff5e5558c241deea3ea7bcd9c354a87">XV_HDMITX1_AUD_ACR_CTS_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>.</p>

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          <td class="memname">u32 XV_HdmiTxSs1_GetAudioNVal </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_tx1.html">XV_HdmiTx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function gets the programmed ACR N Value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XV_HdmiTxSs1 core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Programmed ACR N Value</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmitx1__hw_8h.html#a07578cb7628cd825336759685d553253">XV_HDMITX1_AUD_ACR_N_OFFSET</a>, and <a class="el" href="xv__hdmitx1__hw_8h.html#a374eee1fb3e859285b0e6deeb5cd3b7b">XV_HdmiTx1_ReadReg</a>.</p>

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<h2 class="groupheader">Variable Documentation</h2>
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          <td class="memname">const <a class="el" href="struct_x_v___hdmi_tx1___scdc_field.html">XV_HdmiTx1_ScdcField</a> ScdcField[XV_HDMITX1_SCDCFIELD_SIZE]</td>
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<b>Initial value:</b><div class="fragment"><div class="line">= {</div>
<div class="line">        {0x02, 0xFF, 0},        </div>
<div class="line">        {0x30, 0xFF, 0},        </div>
<div class="line">        {0x31, 0xFF, 0},        </div>
<div class="line">        {0x10, 0x01, 3},        </div>
<div class="line">        {0x10, 0xFF, 1},        </div>
<div class="line">        {0x10, 0xFF, 4},        </div>
<div class="line">        {0x10, 0xFF, 5},        </div>
<div class="line">        {0x30, 0x01, 1}         </div>
<div class="line">}</div>
</div><!-- fragment -->
<p>This table contains the attributes for SCDC fields Each entry consists of: 1) Register Offset 2) Bits Mask 3) Bits Shift. </p>

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